Conventional radio communication systems involve the use of transmitting devices for providing information as a radio frequency (RF) signal. The information can be either analog or digital information that is encoded using one of various radio paging protocols, such as Golay Sequential Code, and then mixed with a carrier frequency for transmission over the air. A radio receiver subsequently receives the RF signal and demodulates it to recover the information included therein.
When digital information has been encoded and transmitted, the radio receiver demodulates the signal to generate a stream of data bits. A recovered clock within the radio receiver is then synchronized to the data bits such that the data bits can be sampled at predetermined times and recognized. In many conventional radio receivers, the data clock is started when the data bits are received, and, after a synchronization process has been undergone, the data bits are sampled, preferably at the center of each bit. During the synchronization process, the recovered clock edges are compared with the edges of the data bits, and the recovered clock signal is then adjusted accordingly. More specifically, when the rising edge of the clock is determined to have been early, the falling edge is delayed, and when the rising edge of the clock is determined to have been late, the falling edge occurs earlier than normal. In this manner, the clock signal becomes synchronized with the incoming data bits after a predetermined number of bits have been received.
A problem can occur when the duty cycle of the data bits is skewed and when both edges of the data are used for adjustment of the clock. In this circumstance, once the clock signal is one-hundred-eighty degrees out of phase with the incoming data bits, the skewed duty cycle causes the clock signal to remain out of phase. This occurs because the radio receiver, upon evaluation of the clock edges, first determines that the clock is late, then early, then late, etc. As a result, the clock cannot recover and insufficient information comprising the data bits will be presented to the user.
Thus, what is needed is a method and apparatus for better synchronizing to incoming digital data such that the clock signal does not lock 180.degree. out of phase with respect to the data.